- Category: EngineeringHire Type: EmployeeJob ID 6028
Key Qualifications
• Bachelor’s or Master’s degree in Electrical Engineering
• 2+ years of experience in FPGA design and development
• Design and simulate integrated circuitry using Verilog, System Verilog
• Experience with FPGA development tools such as XILINX Vivado, and Altera Quartus. Synopsys Synplify or Protocompiler is a plus
• Experience in digital design methods such as floorplanning, timing constraints definition, and static timing analysis
• Familiarity with high-speed interfaces such as Ethernet, DDR/LPDDR
• Familiarity with Peripheral Protocols like I2C, SPI or UART
• Familiarity with embedded processors and software development is a plus
• Proven problem-solving skills and ability to work in a positive team environment
• Excellent verbal and written communication skills in English
• Excellent organizational skills
Preferred Experience
• Expertise with industry-standard scripting languages such Tcl, Python, Perl and Bash
• Expertise with industry-standard interfaces and protocols such as AMBA AXI or APB or AHB.
• Familiarity with simulation tools such as VCS, ModelSim and iSim
• Familiarity with laboratory equipment such as Oscilloscopes, Data-Analyzers and AWG
• Knowledge of computer architecture and operating systems
Travelling
• As a worldwide organization there is sometimes short-term travel maybe required.Responsibilities
• Design, implement, and verify FPGA-based systems for a variety of applications
• Includes end to end responsibilities from Porting Designs to Bitfile generation and timing closure
• Validate FPGA-based IP prototype ‘device under test’ against real-world devices, Test Equipment and other hardware systems
• Create and maintain comprehensive technical documentation
• Elaborate and execute test plans and test routines
• Detect, troubleshoot, debug, and investigate potential ASIC issues up front
• Establish and maintain relationships with cross-functional teams, internal and external customers - Don’t miss out, CLICK HERE (to apply before the link expires)