Job Posted On
09-10-2024
Company Group
Tessolve Semiconductor Private Limited
Department
Digital Design 1
Employee Type
Regular Employee-Probation (IN)
Designation
Sr. Design Engineer 1
Location
- Electronic City, Bengaluru, Karnataka, India (TESIN-EC)
- Guindy, Chennai, Tamil Nadu, India (TESIN-GCH)
- Jubilee Hills, Hyderabad, Telangana, India (TESIN-HYD)
- ORR, Bengaluru, Karnataka, India (TESIN-ORR)
- Whitefield, Bengaluru, Karnataka, India (TESIN-WF)
- Noida, Uttar Pradesh, India (TESIN-ND)
- Sarjapur Road, Bengaluru, Karnataka, India (TESIN-SJP)
Experience Required
4 – 6 years
Job Summary
Position: Design Verification- Senior Design Engineer 1
Experience: 4+ years relevant experience.
Location – Bangalore/Hyderabad/Chennai/Noida
Education: B.Tech/M.Tech
To be successful in this role you will:
Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology.
The person would be working with experienced and motivated team of Designers and Verification resource and able to address the verification challenges in the context of the IP, Subsystem, and overall system, using simulation and formal verification and actively participate in supporting the debug at IP or SoC Level.
Technical Skillset Required:
- IP verification Using SV/UVM
- SOC Verification using C/SV
- VIP Integration
- Interconnect Protocols: AHB, AXI, APB
- SOC Interfaces: GPIO, SPI, I2C, UART (3+)
- High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI
- Memory Interfaces: DDR or HBM I/O
- Coverage Closure: Code, Functional and Toggle
- Tools: Synopsys VCS or Cadence Incisive
- Technical Documentation: Testbench Specification, Test Plan Specification
- Good exposure to Scripting skills like Perl or Python or Shell or TCL .
Don’t miss out, CLICK HERE (to apply before the link expires)
